114 questions
3
votes
1
answer
99
views
Does GCC guarantee state of DF before inline assembly on x86?
Does GCC, when compiling for x86 or x86_64, make sure that the Direction Flag has some specific value before it starts executing an Extended Asm block? I couldn't find any information on that in the ...
3
votes
1
answer
111
views
Can the status register influence data storage in a CPU?
When you perform an arithmetic operation in x86 or x86-64 and say, it results in an overflow flag being set (or any other flag), can the bits being set affect in which register the resulting value ...
1
vote
1
answer
107
views
What is wrong with my derivation of this carry flag result for SUB?
To be clear, I am certain that the derivation below is incorrect, but I am hoping someone can point out where in my "proof" I am wrong.
I am trying to prove that the x86 instruction setb ...
0
votes
1
answer
153
views
How to change UP (direction) flag in x86 assembly to 1?
I want to change flag UP to one, now it is UP = 0. I am using Visual Studio 64-bit assembly.
(Intel calls this the "direction flag", DF).
I tried this:
.data
source DB 'Hello, world!', 0
...
1
vote
2
answers
2k
views
How to move the zero flag into a register in x86-64?
I want to move the zero flag set as the result of a comparison, e.g. "cmp rax,rbx", into a register. I know I can use one of PUSHF/PUSHFD/PUSHFQ to push the flags onto the stack, but now I ...
0
votes
0
answers
29
views
Why eflags register need a PF flag to record even or odd ones in the data? [duplicate]
I understand the purpose of the pf flag, which is to indicate whether there are an even or odd number of ones in the resulting data after certain instructions manipulate the register. However, It is ...
4
votes
2
answers
357
views
In this X86 emulator, why is the overflow flag getting set when adding 0xFFFF to 0xFFFF?
I'm building an x86 emulator, and I'm using this online x86 sandbox to check my work. In my emulator, running this code:
mov AX, 0xFFFF
add AX, AX
...sets AX to 0xFFFE and sets the overflow flag to 0....
7
votes
1
answer
283
views
Why doesn't bitwise NOT affect the ZF bit or any other FLAGS?
NOT on a register holding binary 11111111 will produce 00000000, but ZF will still have its old value, so it might not be 1 even though the output value is all zero.
XOR reg, -1 would do the same ...
0
votes
2
answers
204
views
Overflow flag set to 1 after ROL operation even though it should be undefined
I'm learning 8086 assembly using emu8086, I was playing around with some rotate instructions, and as for my question I know that for more than 1 bit shifts/rotations, the behaviour of the overflow ...
0
votes
0
answers
54
views
Should Sign Bit be ON for -65535 decimal in Intel 8086 assembly language? [duplicate]
I am currently learning about arithmetic operations for Intel 8086 assembly language. I was trying to figure out manually after the below code what would the status of flat bits specially overflow ...
0
votes
0
answers
302
views
does single step interrupt(01H interrupt) clear TF flag after every instruction?
i want to use single step interrupt and i understand that for make this interrupt work for every instruction the TF flag should be 1 (TF=1).
and in my code i see single step interrupt work but after ...
2
votes
1
answer
752
views
Why is the Overflow-Flag only set when single shifts are used?
In the x86 intel reference manual it says:
"The overflow flag is set only if the single-shift forms of the instruction are used. [...]"
But when I have the following scenario:
xor eax, eax
...
0
votes
2
answers
911
views
In MASM64, is there an instruction for pushing a 16-bit immediate on the stack?
In MASM64, if I write the instruction push 0, it will push a 64-bit immediate on the stack (i.e. RSP = RSP - 8).
So if I just want to push a 16-bit immediate to set FLAGS, I have no idea but write the ...
0
votes
0
answers
323
views
X86 what is the purpose of the direction flag in the FLAGS register?
I'm currently learning about the FLAGS register in x86 based processors. I understand that the DF(Direction Flag) is used for deciding if string operation should occur backwards or forwards. Either ...
2
votes
1
answer
940
views
Why parity flag is 1 while number of ones is odd
After executing the following two instructions:
MOV BX, 0FD51H
DEC BX
I get parity flag = 1 (indicating an even number of ones)
However, the binary ...
0
votes
1
answer
1k
views
What is the default value of the Zero Flag in x86 assembly MASM?
For example if I have the following piece of code:
L1:
cmp WORD PTR[ebx],0
jnz found
add ebx,2
loop L1
jmp notFound
Is the zero flag undefined for its default ...
0
votes
0
answers
225
views
If I perform a 32bit operation on the lower 32bits of two 64 bit registers, how will the conditional flags be affected?
Let's say I have the number 0xFFFFFFFFFFFFFFFF in %rdi, and 0x7FFFFFFFFFFFFFFF in %rsi. Let's say I perform a subl %esi, %edi. Would the zero flag be set as 1, or 0? Or what if I perform an addl on ...
0
votes
2
answers
620
views
How to set carry flag in specific bit in GPR without shifts / rotations?
I'm writing a program in NASM for Intel 80386 processor and i need to set the value of carry flag in a specific bit in GPR (general purpose register) without changing other bits in register.
Are there ...
5
votes
1
answer
306
views
Does it cost significant resources for a modern CPU to keep flags updated?
As I understand it, on a modern out of order CPU, one of the most expensive things is state, because that state has to be tracked in multiple versions, kept up-to-date across many instructions etc.
...
1
vote
1
answer
1k
views
Why is the overflow flag not being set in this example?
mov al, -1
add al, 130
I am attempting to answer a question from the textbook for my x86-assembly class. One of the examples asks to explain why the over flag would help you determine if, in ...
2
votes
0
answers
1k
views
Why doesn't mov set the zero flag?
What is the reason why adding a value into a register doesn't alter the zero flag? For example, let's say I have:
mov array(,%rdi,8), %eax
I would need to also do a second operation to check to see ...
1
vote
2
answers
564
views
Arithmetic identities and EFLAGS (emulate SUB using NOT and ADD?)
Since −x = not(x)+1 which then implies a-b = a+not(b)+1, would then
sub rax, rcx
be equivalent to
mov temp, rcx
not temp
add rax, temp
add rax, 1
where temp is some register considered to be ...
0
votes
0
answers
65
views
Imul instruction in assembly x86 [duplicate]
Hello so I have a question about the flag register in x86. How do I know when the CF/OF is 1 or 0.
AX: FFE4 decimal: -28
DX: 0002 decimal: 2
-56 = -28 x 2
DX:FFFF
AX:FFC8
OF/CF: ...
0
votes
2
answers
3k
views
Understanding of the EFLAGS register in x86, going from 1 to 0 to -1 and back
My book and most sources show that when the carry flag is changed from 0 to 1, but i dont understand why the EFL register changes values in much bigger increments as show below: i put comments showing ...
0
votes
1
answer
2k
views
how often does FLAGS register get updated in asm?
When debugging x86 assembly code in VS2013, I needed to check the contents of the FLAGS register. However, when I've enabled "Flags" in Register Window, I got:
OV = 0 UP = 0 EI = 1 PL = 1 ZR = 0 AC = ...