Linker placement order is reversed in map file after compiling

Question

I am adding a linker section in the TI arm clang linker and I have added by following

MEMORY
{
    TEST_SECTION              ( RWIX ) : ORIGIN = 0x41C00000 , LENGTH = 0x00007800
}

--retain="*(.MY_SECTION_1)"
--retain="*(.MY_SECTION_2)"

 .MY_SECTION_1      : {} palign(16)               > TEST_SECTION
 .MY_SECTION_2      : {} palign(16)               > TEST_SECTION

But after generating the map file, i can see that MY_SECTION_2 is allocating first and followed by MY_SECTION_2. Please find the below map file contents

SEGMENT ALLOCATION MAP
 
 run origin  load origin   length   init length attrs members
----------  ----------- ---------- ----------- ----- -------
41c00000    41c00000    000006b0   00000000    rw-
  41c00000    41c00000    00000380   00000000    rw- .MY_SECTION_2
  41c00380    41c00380    00000330   00000000    rw- .MY_SECTION_1



.MY_SECTION_2 
*          0    41c00000    00000380     UNINITIALIZED
                  41c00000    0000037e     host.lib : testfile_Cfg.obj (.MY_SECTION_2)
                  41c0037e    00000002     --HOLE--

.MY_SECTION_1 
*          0    41c00380    00000330     UNINITIALIZED
                  41c00380    00000328     host.lib : test1.obj (.MY_SECTION_1)
                  41c006a8    00000008     --HOLE--


.cinit     0    a513d110    00000060     
                  a513d110    00000015     (.cinit..data.load) [load image, compression = lzss]
                  a513d125    00000003     --HOLE-- [fill = 00000000]
                  a513d128    0000000c     (__TI_handler_table)
                  a513d134    00000008     (.cinit..MY_SECTION_1.load) [load image, compression = zero_init]
                  a513d13c    00000008     (.cinit..bss.load) [load image, compression = zero_init]
                  a513d144    00000008     (.cinit..MY_SECTION_2.load) [load image, compression = zero_init]
                  a513d14c    00000020     (__TI_cinit_table)
                  a513d16c    00000004     --HOLE-- [fill = 00000000]  
  
  

LINKER GENERATED COPY TABLES

__TI_cinit_table @ a513d14c records: 4, size/record: 8, table size: 32
    .data: load addr=a513d110, load size=00000015 bytes, run addr=a513d180, run size=00001080 bytes, compression=lzss
    .MY_SECTION_1: load addr=a513d134, load size=00000008 bytes, run addr=41c00380, run size=00000330 bytes, compression=zero_init
    .bss: load addr=a513d13c, load size=00000008 bytes, run addr=a513e200, run size=00000392 bytes, compression=zero_init
    .MY_SECTION_2: load addr=a513d144, load size=00000008 bytes, run addr=41c00000, run size=00000380 bytes, compression=zero_init

I want to allocate the MY_SECTION_1 to 0x41c00000 memory and followed by MY_SECTION_2. But it's not happening by default.

I have tried to use load command like below

 .MY_SECTION_1      : {} palign(16)  load = 0x41c00000 > TEST_SECTION
 .MY_SECTION_2      : {} palign(16)                    > TEST_SECTION

But it give me the warning and error

warning:  specific address 0x1 overrides alignment of 16 for ".MY_SECTION_1"
error: errors encountered during linking;

What is the issue and how to fix this issue ? Please help.

Please specify the exact linker you use. You can type <prefix>ld -V. For example, arm-none-eabi-ld -V on Ubuntu 24.04 gives GNU ld (2.42-1ubuntu1+23) 2.42. KEEP is probably not needed, but should work. The documentation is here. sourceware.org/binutils/docs/ld Which section do you have an issue with? Have you read sections 3.[1-6]? These are the basics for authoring a linker script. — artless-noise-bye-due2AI
– artless-noise-bye-due2AI, Commented Jul 21 at 14:23
@artless-noise-bye-due2AI This is TI (Texas Instrument) ARM clang compiler — user2986042
– user2986042, Commented Jul 28 at 6:11
Can you try .MY_SECTION_1 : {*(.MY_SECTION_1)} palign(16). You have both input and output sections named '.MY_SECTION_1'. Having options elsewhere can confuse you, me and the tool about what is meant by this value. — artless-noise-bye-due2AI
– artless-noise-bye-due2AI, Commented Aug 7 at 14:37

0___________ · Accepted Answer · 2025-07-19 12:52:03Z

2

Ypu need to declare them in SECTIONS block. Then you willl get the correct order

SECTIONS
{
    .MY_SECTION_1 : {
        KEEP(*(.MY_SECTION_1))
    } palign(16) > TEST_SECTION

    .MY_SECTION_2 : {
        KEEP(*(.MY_SECTION_2))
    } palign(16) > TEST_SECTION
}

edited Jul 19 at 12:52

answered Jul 19 at 11:36

0___________

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2 Comments

user2986042 Jul 21 at 5:41

I am getting the below error : Cannot find file "KEEP" expecting section name instead of "(" error: errors encountered during linking .. Seems like KEEP is not supporting in the linker file

artless-noise-bye-due2AI Jul 28 at 14:40

KEEP should be functionally the same as --retain; I have never seen retain used before. I don't know if this is specific to your toolset. You can omit the KEEP and if you set the sections attributes properly, it is kept anyways (at least with GNU ld) or the --retain flags may work.

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