gvim Systemverilog syntax matching :is there way to match `ifdef `ifndef `else and `endif

Question

I have used standard SystemVerilog syntax packages but not able to match(with % move the cursor between) these strings. This is in the context of matchit function in Vim(https://www.vim.org/scripts/script.php?script_id=39). The problem seems to be with backtick.

I tried:

\u0060

and

`ifdef\>|`ifndef\>:`endif\>,

but it does not work.

I edited your post to hopefully show your code properly. If it's not correct then please fix as needed. — MonkeyZeus
– MonkeyZeus, Commented Feb 11, 2021 at 18:13
"Match" can mean quite a few things depending on the context. What are you trying to do, exactly? — romainl
– romainl, Commented Feb 11, 2021 at 19:48
This is a mistake in vim.org/scripts/script.php?script_id=1586 Systemverilog highlight package — Chandan Choudhury
– Chandan Choudhury, Commented Feb 13, 2021 at 14:34

gdupras · Accepted Answer · 2021-02-12 13:48:50Z

1

I'm assuming you have a file that looks like this:

stuff
`ifdef
    some code
`endif
stuff

With the cursor on `ifdef (or `ifndef), you want to jump to `endif with % then back to `ifdef if you press % again. I'm also assuming you're using the matchit plugin.

Solution:

:let b:match_words='`ifdef\>\|`ifndef\>:`endif\>'

Notice that the | has to be escaped with a backslash. Also, you need quotation marks '. So the backticks were not the problem.

answered Feb 12, 2021 at 13:48

gdupras

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1 Comment

Chandan Choudhury Over a year ago

Thanks ! @ProgMetalSlug the | was not escaped with backslash. There are similar questions like stackoverflow.com/questions/27498221/…. I would like to use the package provided by @Vitor

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