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I want to send a signal to ESP32 through an FPGA using I2C protocol, and I have got a problem:

Can I use the ESP32 WROOM, for example? Does it have the same reg with the same purpose as in this manual (page 399)? It is important so I can know how to set up the I2C timing for example.

Some of this is new to me, so I was wondering if my plan is ok? I want to set up the I2C interface in the FPGA (the master), then program the ESP32 to synchronize as a slave, and establish a TCP connection.

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Can I use the ESP32 WROOM, for example?

Check the ESP32 WROOM (whichever version of that you have, there's multiple!) datasheet / board material. Comes with a schematic that shows you exactly how the on-board ESP32 SoC is connected to the contacts of the module.

It is important so I can know how to set up the I2C timing for example.

No, it's not. I²C is I²C; and while you mustn't be faster than the maximum standard-allowed transmission speed (100 kHz for standard, 400 kHz for fast) when toggling the SCL line, you cannot "set up" timing. That's not how I²C works! It's a bidiretional bus, where the slave device can "hold still" the bus for as long as it needs.

then program the ESP32 to synchronize as a slave,

Are you sure you mean "synchronize", and not just "to act as a slave on the I²C bus"?

There's no synchronization on I²C. A standard-compliant I²C master must respect if the slave holds the clock line low at the end of any bit.

People, including me, would recommend considering using an existing and tested IP core instead of implementing an I²C peripheral in an FPGA yourself; there's just too many ways you can miss a detail. It's a superficially easy, in practice a bit complicated to robustly implement protocol. You don't tell us anything about your FPGA, but chances are very high there's some at least rudimentary tested I²C peripheral for that FPGA – if in doubt, you'd use a FPGA system-on-chip-framework like LiteX to build something like I²C controller + small soft CPU to talk to that and control data flow + a bus interface to whatever you're doing on that FPGA.

and establish a TCP connection.

So, your primary job here really is writing firmware for the ESP32 and making it communicate with the FPGA over some bus.

Unless you need to connect a lot more peripherals, just use the UART or the SPI interface, not I²C: To communicate between exactly two devices, you don't need any of the features of I²C; not the addressing, not the bus arbitration, not flexible clocking, not the multi-mastering, …

Implementing an SPI interface is orders of magnitudes easier than implementing a I²C interface, and even if you use (which I'd strongly recommend) an existing I²C IP core for your FPGA, it's easier to implement SPI than to implement an interface into an I²C core.

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    \$\begingroup\$ I²C is simply a relatively complex protocol. thinking writing an I²C interface is simple means you're underestimating the complexity of the state machine. It's so complex, even FTDI, which make all their money doing USB-to-X interfaces, have had bugs in their implementations. The Cadence I²C core, giant company that does nothing but sell very expensive license for components for ICs, included in the early versions of Xilinx Zynq FPGA's bootloaders, is buggy enough that you must under no circumstances try to do a multi-byte transfer, and so on. I²C is not a thing to implement in an afternoon :) \$\endgroup\$ Commented Jun 11 at 14:26
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    \$\begingroup\$ I'm not here do dissuade you from challenging things, but start with an SPI interface. Once you've implemented that, try an I²C interface. I bet you can't even build a good SPI interface ;) (just kidding, but really, don't start with I²C before you did SPI, if you want your project to finis at any point). \$\endgroup\$ Commented Jun 11 at 15:27
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    \$\begingroup\$ I mean, I could repeat that for the fourth time, but maybe that won't be any more convincing to you than the first three times where I said that I²C is surprisingly complex. \$\endgroup\$ Commented Jun 11 at 16:17
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    \$\begingroup\$ @IlanMermelstein - If you still insist on I2C you should consider changing roles of the FPGA end. Let the FPGA be the slave and have the ESP-32 be the master. I have implemented I2C slave in an FPGA in the past and that is fairly straight forward. I would not touch building an I2C master into an FPGA with a 10 meter pole. \$\endgroup\$ Commented Jun 11 at 20:49
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    \$\begingroup\$ @TonyM well, in that case: my apologies for misinterpreting you :) I think your last comment is doubly valuable, aside from the assessment (and yeah, I²C isn't that complex, just, you know, you need to consider the pull-down and thus "OR" nature of signalling, you actually need to think about what happens when the other side stops reacting at different times in your transfer, you need to implement the address decoder to know you're the device that's meant, etc.): The "Design your interface by working with bus specs and considering the design alternatives you can choose from until consistency \$\endgroup\$ Commented Jun 12 at 10:39

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