I would like to accurately simulate a basic CE amplifier that I have soldered and probed with a 10 MHz sine wave applied to the input.
My amplifier Zin simulations yield a negative resistive component when Q1 is bypassed by C2. Probing with oscilloscope at the collector of Q1, the bypassed circuit provides much greater voltage amplification.
I interpret this as: When my input signal voltage rises, current into the amplifier would decrease, and when the input signal voltage falls, current into the amplifier would increase. Rephrased, a negative resistance causes a 180 degree phase offset between voltage and current. Both are still making their way to the amplifier.
Would this mean that the amplifier would still amplify as one might expect, but with a different phase offset between input and output voltage than the usual 180 degrees of an inverting amplifier?
Example 1 (Convention): Multiplying the expression for input impedance looking into R4 by (-1) yields the correct input impedance of 50 ohms instead of -50 ohms.
Example 2 (Unbypassed) Without C2 connected, the resistive term of impedance looking into C1 at n004 is positive.
Bypassing R3 with C2 results in a negative resistive impedance component.
Transistor model:
.model 2N3904 NPN(
IS=1E-14
VAF=100
Bf=300
IKF=0.4
XTB=1.5
BR=4
CJC=4E-12
CJE=8E-12
RB=20
RC=0.1
RE=0.1
TR=250E-9
TF=350E-12
ITF=1
VTF=2
XTF=3
Vceo=40
Icrating=200m
mfg=NXP
)
(line breaks added for legibility)
Update:
Using an AC 1 current source and dividing input node voltage by "1A" to get ohms while setting y-axis to a linear bode blot yields a positive resistive impedance.
Changing the y-axis mode to Cartesian instead of a bode plot results in a negative resistive impedance.

ISthe saturation current, and isn't 10 femtoampere a bit low? \$\endgroup\$exp(V_BE / (25 mV)) - 1(at room temp), which very quickly gets very large. \$\endgroup\$