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I am working on a voltage to frequency converter, which I would like to simulate in LTspice to achieve optimum conditions before I put it into practice. However, I cannot seem to find any resources showing how to plot the frequency at a node against either voltage another.

I also considered using a series resistor and charging capacitor in a transient analysis and plotting frequency against time, but could not find a way to do this either.

Does anyone know whether there is a way to achieve this natively within LTspice?

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    \$\begingroup\$ The question fails a criterion of 'show what you have achieved so far'. But notice that with LTspice you do have a command applicable to converting tran analysis data into time/frequency-vs-voltage/current plots, it is a .measure command. See LTspice examples LoopGain.asc and FRA/Eg123.asc for ideas, also examine related questions on electronics.SE. \$\endgroup\$ Commented Nov 6, 2024 at 5:50
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    \$\begingroup\$ Not a proper answer since I have nothing on the frequency, but for voltage, cheat and ramp your voltage 1:1 with time. That way the X-axis says [s] but you know it's actually [V]. \$\endgroup\$ Commented Nov 6, 2024 at 7:59

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You might be able to do this with the help of stepped simulations and measurement commands.

Consider this simple voltage to frequency converter: a simple voltage to frequency converter based on modulate

This will convert a voltage at the FM port to a voltage with the frequency at the Q port.

To get a plot of voltage versus frequency, I use a stepped input voltage using .step param Vin 1 100 1 and of course the parameter has to be used by the voltage source controlling the FM port, so I put {Vin} there.

Then I need to measure the frequency in a way, the data is recorded in a way it can be processed by LTSpice. This is done using .meas directives:

.meas t1 FIND time WHEN V(FreqOut)=0 RISE=1
.meas t2 FIND time WHEN v(FreqOut)=0 RISE=2
.meas T param t2-t1

This measures the time from the first zero crossing to the second zero crossing. This probably needs some tweaking for your application. It can have a delay so it will start only after some time, when your circuit reached a stable state.

After that open the error log View -> SPICE Error Log, right click the error log and select Plot .step'ed .meas data: Plot .step'ed .meas data

You will get a new empty plot window. Right click and add a trace, in this example type 1/t to get the frequency:

Plotted result

Complete netlist for this experiment:

A1 VoltIn N001 0 0 0 0 FreqOut 0 MODULATOR mark=1 space=0
V1 N001 0 1
V2 VoltIn 0 {Vin}
.param Vin 5
.tran 1
.meas t1 FIND time WHEN V(FreqOut)=0 RISE=1
.meas t2 FIND time WHEN v(FreqOut)=0 RISE=2
.meas T param t2-t1
.step param Vin 1 100 1
.backanno
.end
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  • \$\begingroup\$ That works a charm, thank you very much! \$\endgroup\$ Commented Nov 6, 2024 at 12:08
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SPICE in general can't do this.

Best thing to do is make a simple (ideal) circuit to perform this. One way is charge a C with a current source, S/H the V at each clock edge, and then reset the C. You can use 'ideal' switches for this.

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